The IBM S/390 (both marks are registered trademarks of International Business Machines Corporation) has developed and used millicode in the hierarchical cache structure using a read only storage structure for millicode in an SMP environment. In this environment it would be desireable to load millicode by scanning, special instructions, or normal instructions into a writeable code array (not ROS). As illustrated by the IBM S/390 G4 CMOS, the state of the art has provided for the use of highly priveleged subroutines in 390-like code, which are called milli-code, to provide new processors with the capabilities it needs without adding excessive complexity. Two previous solutions have included 1) loading the code array by scanning, and/or 2) loading the code array by using some variation of store instructions. When the previous solution used normal store instructions, and the code array's data is read-only, then there was a forced reduction in performance by generating unnecessary exclusive fetches/stores/castouts through the storage hierarchy. But when special store instructions were employed, design complexity was added to process these unique requests. Furthermore, some of these solutions, such as scanning, have been frustratingly slow.
In this connection, it should be explained that IBM 1997 G4 machines use a ROS (read-only storage) array. A ROS is, by definition, not writable, and it can not be loaded using scanning, store instructions, special store instructions, etc. The "code" or "contents" of ROS are hardwired in the circuitry. A ROS has no loading function. A read-only storage (ROS) structure has the drawback that changes to its code/contents require physical change to the chip, which is expensive and slow. While IBM's earlier G3 machines which were CMOS machines used microcode for some routines, the G4 CMOS machine introduced in 1997 was the first to use millicode.
Even earlier IBM S/390 machines which were bipolar did use a writable code array, although their code array was not part of the bce/L1 cache structure. Their code array could be loaded using scanning, store instructions, special store instructions, etc. (one of those methods). Earlier 390 bipolar machines also used microcode and not millicode.
Once we have provided during development of our invention a writable code array (which by definition is not a ROS) for our new machines a writeable code array which is part of our bce/L1 cache structure, we could have loaded it using scanning, store instructions, or special store instructions, but instead after making our invention prefer the idea being described.